A
[RX] Add | AD
[RX] Add Normalized (L) | ADR
[RR] Add Normalized (L) | AE
[RX] Add Normalized (S) |
AER
[RR] Add Normalized (S) | AH
[RX] Add Halfword | AL
[RX] Add Logical | ALR
[RR] Add Logical |
AP
[SS] Add Decimal | AR
[RR] Add | AU
[RX] Add Unnormalized (S) | AUR
[RR] Add Unnormalized (S) |
AW
[RX] Add Unnormalized (L) | AWR
[RR] Add Unnormalized (L) | AXR
[RR] Add Normalized (E) | BAL
[RX] Branch and Link |
BALR
[RR] Branch and Link | BAS
[RX] Branch and Save | BASR
[RR] Branch and Save | BC
[RX] Branch on Condition |
BCR
[RR] Branch on Condition | BCT
[RX] Branch on Count | BCTR
[RR] Branch on Count | BXH
[RS] Branch on Index High |
BXLE
[RS] Branch on Index Low or Equal | C
[RX] Compare | CD
[RX] Compare (L) | CDR
[RR] Compare (L) |
CDS
[RS] Compare Double and Swap | CE
[RX] Compare (S) | CER
[RR] Compare (S) | CH
[RX] Compare Halfword |
CL
[RX] Compare Logical | CLC
[SS] Compare Logical | CLCL
[RR] Compare Logical Long | CLI
[SI] Compare Logical |
CLM
[RS] Compare Logical Characters under Mask | CLR
[RR] Compare Logical | CLRCH
[S] Clear Channel | CLRIO
[S] Clear I/O |
CONCS
[S] Connect Channel Set | CP
[SS] Compare Decimal | CR
[RR] Compare | CS
[RS] Compare and Swap |
CVB
[RX] Convert to Binary | CVD
[RX] Convert to Decimal | D
[RX] Divide | DD
[RX] Divide (L) |
DDR
[RR] Divide (L) | DE
[RX] Divide (S) | DER
[RR] Divide (S) | DISCS
[S] Disconnect Channel Set |
DP
[SS] Divide Decimal | DR
[RR] Divide | ED
[SS] Edit | EDMK
[SS] Edit and Mark |
EPAR
[RRE] Extract Primary ASN | ESAR
[RRE] Extract Secondary ASN | EX
[RX] Execute | HDR
[RR] Halve (L) |
HDV
[S] Halt Device | HER
[RR] Halve (S) | HIO
[S] Halt I/O | IAC
[RRE] Insert Address Space Control |
IC
[RX] Insert Character | ICM
[RS] Insert Characters under Mask | IPK
[S] Insert PSW Key | IPTE
[RRE] Invalidate Page Table Entry |
ISK
[RR] Insert Storage Key | ISKE
[RRE] Insert Storage Key Extended | IVSK
[RRE] Insert Virtual Storage Key | L
[RX] Load |
LA
[RX] Load Address | LASP
[SSE] Load Address Space Parameters | LCDR
[RR] Load Complement (L) | LCER
[RR] Load Complement (S) |
LCR
[RR] Load Complement | LCTL
[RS] Load Control | LD
[RX] Load (L) | LDR
[RR] Load (L) |
LE
[RX] Load (S) | LER
[RR] Load (S) | LH
[RX] Load Halfword | LM
[RS] Load Multiple |
LNDR
[RR] Load Negative (L) | LNER
[RR] Load Negative (S) | LNR
[RR] Load Negative | LPDR
[RR] Load Positive (L) |
LPER
[RR] Load Positive (S) | LPR
[RR] Load Positive | LPSW
[S] Load PSW | LR
[RR] Load |
LRA
[RX] Load Real Address | LRDR
[RR] Load Rounded (E/L) | LRER
[RR] Load Rounded (L/S) | LTDR
[RR] Load and Test (L) |
LTER
[RR] Load and Test (S) | LTR
[RR] Load and Test | M
[RX] Multiply | MC
[SI] Monitor Call |
MD
[RX] Multiply (L) | MDR
[RR] Multiply (L) | ME
[RX] Multiply (S/L) | MER
[RR] Multiply (S/L) |
MH
[RX] Multiply Halfword | MP
[SS] Multiply Decimal | MR
[RR] Multiply | MVC
[SS] Move |
MVCIN
[SS] Move Inverse | MVCK
[SS] Move with Key | MVCL
[RR] Move Long | MVCP
[SS] Move to Primary |
MVCS
[SS] Move to Secondary | MVI
[SI] Move | MVN
[SS] Move Numerics | MVO
[SS] Move with Offset |
MVZ
[SS] Move Zones | MXD
[RX] Multiply (L/E) | MXDR
[RR] Multiply (L/E) | MXR
[RR] Multiply (E) |
N
[RX] AND | NC
[SS] AND | NI
[SI] AND | NR
[RR] AND |
O
[RX] OR | OC
[SS] OR | OI
[SI] OR | OR
[RR] OR |
PACK
[SS] Pack | PC
[S] Program Call | PT
[RRE] Program Transfer | PTLB
[S] Purge TLB |
RDD
[SI] Read Direct | RIO
[S] Resume I/O | RRB
[S] Reset Reference Bit | RRBE
[RRE] Reset Reference Bit Extended |
S
[RX] Subtract | SAC
[S] Set Address Space Control | SCK
[S] Set Clock | SCKC
[S] Set Clock Comparator |
SD
[RX] Subtract Normalized (L) | SDR
[RR] Subtract Normalized (L) | SE
[RX] Subtract Normalized (S) | SER
[RR] Subtract Normalized (S) |
SH
[RX] Subtract Halfword | SIGP
[RS] Signal Processor | SIO
[S] Start I/O | SIOF
[S] Start I/O Fast Release |
SL
[RX] Subtract Logical | SLA
[RS] Shift Left Single | SLDA
[RS] Shift Left Double | SLDL
[RS] Shift Left Double Logical |
SLL
[RS] Shift Left Single Logical | SLR
[RR] Subtract Logical | SP
[SS] Subtract Decimal | SPKA
[S] Set PSW Key from Address |
SPM
[RR] Set Program Mask | SPT
[S] Set CPU Timer | SPX
[S] Set Prefix | SR
[RR] Subtract |
SRA
[RS] Shift Right Single | SRDA
[RS] Shift Right Double | SRDL
[RS] Shift Right Double Logical | SRL
[RS] Shift Right Single Logical |
SRP
[SS] Shift and Round Decimal | SSAR
[RRE] Set Secondary ASN | SSK
[RR] Set Storage Key | SSKE
[RRE] Set Storage Key Extended |
SSM
[S] Set System Mask | ST
[RX] Store | STAP
[S] Store CPU Address | STC
[RX] Store Character |
STCK
[S] Store Clock | STCM
[RS] Store Characters under Mask | STCTL
[RS] Store Control | STD
[RX] Store (L) |
STE
[RX] Store (S) | STH
[RX] Store Halfword | STIDC
[S] Store Channel ID | STIDP
[S] Store CPU ID |
STM
[RS] Store Multiple | STNSM
[SI] Store Then AND System Mask | STOSM
[SI] Store Then OR System Mask | STPT
[S] Store CPU Timer |
STPX
[S] Store Prefix | SU
[RX] Subtract Unnormalized (S) | SUR
[RR] Subtract Unnormalized (S) | SVC
[RR] Supervisor Call |
SW
[RX] Subtract Unnormalized (L) | SWR
[RR] Subtract Unnormalized (L) | SXR
[RR] Subtract Normalized (E) | TB
[RRE] Test Block |
TCH
[S] Test Channel | TIO
[S] Test I/O | TM
[SI] Test under Mask | TPROT
[SSE] Test Protection |
TR
[SS] Translate | TRT
[SS] Translate and Test | TS
[S] Test and Set | UNPK
[SS] Unpack |
WRD
[SI] Write Detect | X
[RX] Exclusive OR | XC
[SS] Exclusive OR | XI
[SI] Exclusive OR |
XR
[RR] Exclusive OR | ZAP
[SS] Zero and Add |
| Instructions Supported: 86 |
|---|
